DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013000)
{
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
Scope (\_PR_.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 13.0 / Mac OS X 10.9.3 (13D65)", Debug)
Store ("target processor.....: i3-3120M", Debug)
Store ("running processor....: Intel(R) Core(TM) i3-3120M CPU @ 2.50GHz", Debug)
Store ("baseFrequency........: 1200", Debug)
Store ("frequency............: 2500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 4", Debug)
Store ("maximum TDP..........: 35", Debug)
Store ("packageLength........: 14", Debug)
Store ("turboStates..........: 0", Debug)
Store ("maxTurboFrequency....: 2500", Debug)
Store ("machdep.xcpm.mode....: 0", Debug)
}
Name (APLF, Zero)
Name (APSN, Zero)
Name (APSS, Package (0x0E)
{
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x09C4, 0x0088B8, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x0081C3, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x007AF0, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x00743E, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x006DAE, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x00673F, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x0060F1, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x005AC3, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0054B5, 0x0A, 0x0A, 0x1100, 0x1100 },
Package (0x06) { 0x0640, 0x004EC7, 0x0A, 0x0A, 0x1000, 0x1000 },
Package (0x06) { 0x05DC, 0x0048F9, 0x0A, 0x0A, 0x0F00, 0x0F00 },
Package (0x06) { 0x0578, 0x00434A, 0x0A, 0x0A, 0x0E00, 0x0E00 },
Package (0x06) { 0x0514, 0x003DBA, 0x0A, 0x0A, 0x0D00, 0x0D00 },
/* Low Frequency Mode */
Package (0x06) { 0x04B0, 0x003849, 0x0A, 0x0A, 0x0C00, 0x0C00 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 29", Debug)
/* Low Power Modes for CPU0 */
Return (Package (0x06)
{
One,
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x07,
0xF5,
0xC8
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR_.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
/* Low Power Modes for CPU1 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (\_PR_.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
}